I did the boot ROM and some kernel bits, 1982 to 1984. We shipped a pretty computer, and then 1.5 years later shipped a computer that actually worked. My first corporate job, and certainly a lot of fun.

We at the Byte Shop Seattle got a unit to evaluate. Right away I thought it was a fine machine but not something that would fit into our direction selling more consumer machines than anything else. We were an Alpha Micro and Northstar dealer and rarely sold either of them.

I worked for Western Digital (WD), the company that supplied the disk controller for the on the Fortune 32:16. I designed the parallel section and firmware for the hard disk controller. Fortune’s controller was based on the WD’s WD1001 ECC disc controller that was intended for Seagate ST506 drives. It was based on five 20-pin WD-designed gate arrays and the Signetics 8X305 processor. The 8X305 was a special beast. It could execute instructions 3x faster than the Fortune 32:16’s native 68000 processor. But the 8X305 only had EIGHT instructions. Its speed allowed me to read 5Mbits/sec parallelized data off the disc and make real time decisions on that data. It also allowed me to implement the WD1001’s eight virtual host-facing registers in software. Since the Fortune 32:16 was all about performance, the disk controller needed to implement DMA. DMA controllers of the era typically handled only 8 bit data and 16 bit addressing. The 32:16 bus had 16 bit data and 24 bit addressing. I came up with a DMA solution that required no LSI devices nor counters. I had the 8X305 run the 24 bit counters and 8-to-16 bit bus conversion in software. The 8X300 would send addresses and data to simple, cheap octal latches. The Fortune engineers did not like this software solution because they perceived it as slow. Yet, in their own DMA specification, they required devices to not hog bus bandwidth. I demonstrated that the 8×305 software solution met both Fortune’s performance and non-bus hogging goals. The software loop required to update 16 bits of data, update the least significant byte of the address, maintain a word counter, initiate the DMA state machine, and wait for completion was only 8 8X305 instructions or 2 microseconds (us). The required 256 16-bit word DMA transfer could happen in just 512 uS. The sector time of the disk drive was about 1000 us. So my software DMA could deliver data to/from memory at full disc speed. (DMA transfers that crossed 8 bit and 16 bit boundaries took 2.75 us and 3.25 us, respectively.)