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ZX81 T-shirts!
Ready prompt T-shirts!
Atari joystick T-shirts!
Arcade cherry T-shirts!
Spiral program T-shirts!
Battle Zone T-shirts!
Vectrex ship T-shirts!
Elite spaceship t-shirt T-shirts!
Competition Pro Joystick T-shirts!
Atari ST bombs T-shirts!
Moon Lander T-shirts!
C64 maze generator T-shirts!
Pak Pak Monster T-shirts!
BASIC code T-shirts!
Breakout T-shirts!
Vector ship T-shirts!
Pixel adventure T-shirts!
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| Saturday 26th March 2022 | Achim Baque (Germany) | | I own the only prototype, visited John Blankenbaker several times and he even signed the computer for me. I have some information, pictures and even a video on my website.
In 2022 John gave me the permission to preserve his legacy and continue his former website kenbak-1.net. It is now hosted here: kenbak-1.info. |
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| Sunday 1st July 2007 | Julian Skidmore (Manchester, UK) | | Although the Kenbak-1's oscillator is 1MHz, it's clock speed was half that at 500KHz and simple calculations show it must execute instructions at an astonishingly low rate 300 instructions per second or less. This is because
1. Memory is 1024 bits of serial memory, so random access will take 512 cycles on average - 1000 access per second.
2. CPU registers are placed in main memory too, and a typical instruction involves reading/writing the program counter, the accumulator and the instruction itself. Thus a maximum 1000/3 = 333 instructions can execute per second.
Having said that, the architecture is impressive. It looks like a typical 8-bit CPU: with several registers, multiple addressing modes including indexed addressing and variable length instructions. |
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| Monday 14th November 2022 | Thomas Jones (United States) | | Julian Skidmore has some great comments about speed, but I have a few corrections. While the nominal clock speed is 1 MHz as stated, and there is a divider which divides it down to two 500 KHz clock phases signals for the shift registers, these Intel 1404A shift registers are actually two lines multiplexed, so each of the clock phases cause one input and output data, so the bit rate still stays at 1 million bits per second. But she''s off by a factor of 3 on the instruction rate.
And while Mike Corregan has some great analysis, and did some python emulations, you can''t beat measuring the instruction time on a real original Kenbak-1 computer. On my computer, which has a clock rate a bit low (800 KHz, maybe due to aging of resistors and capacitors) the standard "count and display" program executes at 768 instructions/second, and those are all 2-byte instructions. If my clock rate was increased to the nominal 1 MHz, I''d expect the instruction rate to be close to 1000 instructions//second. The program on the website kenbak.com when run, flashes the high-order bit at once/second, which is 256 loops, and 3 instructions/loop, so 768 instructions/second.) |
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| Tuesday 7th September 2021 | Mike Corrigan (United States) | | It turns out that I was wrong about the time a ''typical'' instruction takes. The average instruction seems to take about 4ms, with a few taking 2ms and a few taking 6ms. There are lots of reasons for variation, and it is hard to predict. So I wrote a python program which embodies the state machine described in the Kenbak-1 Theory of Operations document. This allows me to put in a Kenbak program and it gives all the details about the timings of each instruction executed. The first thing I noticed is that every instruction takes an integral multiple of 128 byte times (byte time is 16us). So the only possible instruction times are 2ms, 4ms, 6ms, 8ms, 10ms and 12ms (The longest running instruction I could find takes 6 byte times (12ms).
I ran a program which finds all of the fibonacci numbers between 0 and 65536 and the average instruction time was right about 4ms ... 256 instructions per second.
There are some interesting things I noticed:
$ Any instruction placed at address 4 (or 0x84) will take 2ms longer than anywhere else.
$ Any instruction that modifies the X register will take 2ms longer than the same instruction modifiying A or B.
$ Any instruction that has a memory operand whose address (module 128) is less that the instruction''s address (modulo 128) will take 2ms longer than if the memory operand''s address (modulo 128) is greater than the instruction''s address (modulo 128) |
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| Monday 6th September 2021 | Mike Corrigan (United States) | | Regarding Julian Skidmore''s post:
The typical instruction really involves four memory accesses. the program counter, the instruction itself, a register and a memory operand. (Only those with immediate operands and shifts do not have a separate memory operand. So assuming all acccess are random, this would only give 250 instructions per second.
The clock was indeed about 512KHz, and the serial memory was two shift registers of 1024 bits each (which were shifted in parallel). This means that one pass through the memory takes about two milliseconds. But, because of the layout of the registers, code and data in memory$ the time between executions of consecutive instructions was almost always about 2 ms. (This is true for all but except store and jmp-and-mark instructions which typically take 4 ms, and indirect and indexed memory modes which could take even more) This presumes that data bytes are placed at higher memory addresses than the code. The machine would access the program counter, the instruction, the memory operand and finally the target register all in a single pass through the memory. At that point it is in position to do it again (the program counter comes right after the registers) The store instruction needed to access the memory operand last causing a second pass through the memory. So the typical instruction took about 2 ms, with some taking 4.
Many programs could come near to executing 500 instructions per second. |
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